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 Test and dEpendability of microelectronic integrated SysTems

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Power consumption Computer architecture Process variability Phase noise RF integrated circuits Hardware Computational modeling Random access memory Hardware Security Libraries Transient faults Automatic test pattern generation Test Dependability ATPG Analog signals Protons Simulation Security Soft errors Through-silicon vias Delays Stream Cipher Fiabilité Heavy ions Integrated circuits Digital signal processing 1-bit acquisition Microprocessors Diagnosis Power demand Alternate testing Flip-flops Test and Security Machine-learning algorithms Integrated circuit design RF test JTAG Single event upset SEU Radiation Analog/RF integrated circuits Scan Attacks Countermeasure Reliability Approximate computing ZigBee Atmospheric neutrons Data retention 3D integration Indirect testing Education Fault simulation Databases Multiple cell upset MCU Circuit faults Integrated circuit testing Dynamic test Clocks SEU Hardware Trojan Memories SER COTS Transistors Diffusion model Software Test cost reduction Cryptography Transient analysis Laser Fault tolerant systems Fault Injection Estimation Noise measurement Logic gates Scan Encryption BIST Fault injection Fault attacks Logic testing Integrated circuit modeling Hardware security Cross section Testing SRAM Integrated circuit reliability Context Saving Monitoring Power supplies Test efficiency Ensemble methods Switches Fault tolerance FDSOI OQPSK Digital ATE Particle detector Encryption One bit acquisition Design for testability Microprocessor chips